In integrated circuits, an electrostatic discharge (ESD) protection circuit is required to detect an ESD event and to turn ON a clamp device until the end of the ESD event. FIG. 1 schematically illustrates a prior ESD protection circuit 100. As shown in FIG. 1, the ESD protection circuit 100 comprises a clamp control circuit 103 and a clamp switch 104. The clamp control circuit 103 is coupled between a node 101 and a node 102. The clamp control circuit 103 is configured to detect an ESD event based on the rising time of a fast rising voltage signal (such as the voltage VAB shown in FIG. 1. Typically, the rising time of VAB in an ESD event is 10˜100 ns. When an ESD event is detected, the clamp control circuit 103 generates a clamp control signal vg to turn ON the clamp switch 104 for a predetermined time period. Because the rising time of VAB in a power-up event is in millisecond range which is much longer than the rising time in an ESD event, the clamp control circuit 103 can distinguish the two events based on the rising time.
In the prior art shown in FIG. 1, the clamp control circuit 103 will detect an ESD event and turn ON the clamp switch 104 if the rising time of VAB is shorter than a time threshold τ1, and the ON-time of the clamp switch 104 is equal to the time threshold τ1. In order to ensure that the clamp switch 104 be turned ON during the entire ESD duration, the time threshold τ1 should be long enough, typically for 1 μs.
However, in some applications, operations such as “hot-swap” may result in a very fast rising time of VAB, typically a few microseconds or even hundreds of nanoseconds. False triggering of the clamp switch 104 may occur in such operations.